The present invention relates to a circuit that generates an external synchronous signal (an external frame synchronous signal and an external horizontal synchronous signal) from an external synchronous reference signal. The external synchronous signal is used as, for example, a timing signal when the waveform of a digital video signal (HD-SDI or SD-SDI) is displayed. The present invention also relates to a circuit that measures a phase difference between the external synchronous reference signal and the digital video signal while the external synchronous signal is being generated.
FIG. 1 shows the flow of a digital video signal. As shown in FIG. 1, at a broadcasting station, multiple digital video signals from the respective video signal output devices 11 are inputted to a switcher 12. The switcher switches one of the multiple digital video signals to another. The switcher then outputs the switched digital video signal (the selected digital video signal 14). In this situation, the phase of a digital video signal 13a selected before the switching must match the phase of a digital video signal 13b selected after the switching. This is because each of the digital video signals has a switching point and because when the digital video signal 13 is switched at a point other than the switching point, a video in the digital video signal 14, outputted by the switcher, is disturbed every time the signal is switched. In short, when the phases of the multiple digital video signals 13 match, the switching points of the multiple digital video signals also match. As a result, when the switcher switches one digital video signal 13a to another digital video signal 13b, the video in the digital video signal 14, outputted by the switcher, is not disturbed.
To match the phases of multiple digital video signals with one another, it is necessary to measure the phase of each digital video signal. FIG. 2 shows an example of a system that measures the phase of each digital video signal. As shown in FIG. 2, an external reference synchronous signal 24 (an analog reference synchronous signal: a composite of a horizontal synchronous signal and a vertical synchronous signal) from an external reference synchronous generator 21 is inputted to a waveform monitor 22. In a signal processing circuit 23 of the waveform monitor, an external frame synchronous signal (an external vertical synchronous signal) is separated from the external reference synchronous signal 24.
Further, two digital video signals 13a and 13b from the respective video signal output device 11 are inputted to the waveform monitor 22. In the waveform monitor 22, one of the digital video signals 13a and 13b is connected to the signal processing circuit 23. Operations of the signal processing circuit will be described assuming that the digital video signal 13a is connected to the signal processing circuit 23. In the signal processing circuit 23, a clock (a parallel clock: PCLK) of the digital video signal 13a is reproduced from the digital video signal 13a. 
The signal processing circuit 23 generates an external horizontal synchronous signal from the external frame synchronous signal and the clock of the digital video signal 13a; the external horizontal synchronous signal is phase-synchronous with the external frame synchronous signal of the external reference synchronous signal 24 and has the same period as the horizontal synchronous period of the digital video signal 13a. Such signal processing is disclosed in Patent Document 1 or 2. The external frame synchronous signal corresponds to a vertical synchronous signal for an SDTV signal shown in Patent Document 1 or 2. Further, the external horizontal synchronous signal corresponds to a trigger signal.
The waveform monitor 22 displays the waveform of the digital video signal 13a using the external frame synchronous signal and external horizontal synchronous signal instead of a frame synchronous signal (internal frame synchronous signal) and a horizontal synchronous signal (internal horizontal synchronous signal) of the digital video signal 13a. When the external synchronous signal is used in place of the internal synchronous signal, the phase difference between the external reference synchronous signal 24 and the digital video signal 13a is reflected in the display of the waveform of the digital video signal 13a. Observing the display of the waveform of the digital video signal 13a (for example, a start point of the horizontal synchronous signal of the digital video signal 13a) enables the phase of the digital video signal 13a to be measured. When the waveform of the digital video signal 13a is displayed on the waveform monitor 22, the position of a marker is adjusted so that the marker aligns with the start point of the horizontal synchronous signal of the digital video signal 13a. 
Then, in place of the digital video signal 13a, the digital video signal 13b is connected to the signal processing circuit 23. As in the case of the processing of the digital video signal 13a, the waveform of the digital video signal 13b is displayed using the external frame synchronous signal and the external horizontal synchronous signal. The phase difference between the external reference synchronous signal 24 and the digital video signal 13b is reflected in the display of the waveform of the digital video signal 13b. Observing the display of the waveform of the digital video signal 13b (for example, a start point of the horizontal synchronous signal of the digital video signal 13b) enables the phase of the digital video signal 13b to be measured. Then, by observing the start point of the horizontal synchronous signal of the digital video signal 13b and a marker coinciding with the start point of the horizontal synchronous signal of the digital video signal 13a, the relative phase difference between the digital video signals 13a and 13b are measured.
In this situation, the phase of the digital video signal 13b can be adjusted using a phase adjuster (not shown; for example, a phase adjusting circuit inside the video signal output device 11 or a phase adjuster connected between the video signal output device 11 and the waveform monitor 22). The phases of multiple digital video signals (13a and 13b) can be matched with each other by adjusting the phase of the digital video signal 13b while viewing the waveform monitor 22.    [Patent Document 1] Japanese Patent Laid-Open No. 11-215447    [Patent Document 2] U.S. Pat. Document No. 6,130,708